International Journal of Optics and Applications
p-ISSN: 2168-5053 e-ISSN: 2168-5061
2011; 1(1): 8-12
doi: 10.5923/j.optics.20110101.02
Samir Sahu 1, Radha Raman Pal 1, Shantanu Dhar 2
1Department of Physics and Technophysics, Vidyasagar University, Midnapore, 721102, India
2Department of Physics, Jhargram Raj College, Jhargram, 721507, India
Correspondence to: Samir Sahu , Department of Physics and Technophysics, Vidyasagar University, Midnapore, 721102, India.
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This paper demonstrates an all-optical 1-bit Random Access Memory (RAM) with massive use of nonlinear material. All-optical switching mechanism is exploiting here to realize the all-optical 1-bit RAM. The all-optical switch by a composite slab of linear medium (LM) and non-linear medium (NLM) is the building block of our proposed 1-bit RAM circuit. An all-optical clocked D flip flop is the main storing element of the RAM. These circuits are simple and all-optical in nature. It can also gear up to the highest capability of optical performance in high-speed all-optical data storing, computing and communicating system.
Keywords: Nonlinear Material, All-Optical Switch, All-Optical D Flip-Flop, 1-Bit Read/Write Memory Cell, All-Optical RAM
Cite this paper: Samir Sahu , Radha Raman Pal , Shantanu Dhar , "Implementation of 1-Bit Random Access Memory Cell in All-Optical Domain with Non-linear Material", International Journal of Optics and Applications, Vol. 1 No. 1, 2011, pp. 8-12. doi: 10.5923/j.optics.20110101.02.
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![]() | Figure 1. Intensity switching of optical nonlinear material |
![]() | Figure 2. All-optical NOT gate |
![]() | Figure 3. All-optical AND gate using NLM. (a) two-input AND gate. (b) three-input AND gate |
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). The main storing component of this RAM cell is the clocked D flip-flop[9, 11] shown in the dash box as in Figure 4. The truth table is depicted in Table 2. Except the D flip-flop, here we use one all-optical NOT gate (NG6) and two AND gates (AG5 and AG6). AG5 is a two-input AND gate while AG6 is a three-input AND gate. All the gates are based on optical nonlinear material as the basic building block of our proposed RAM cell. The R/
input is complemented at the D10 terminal through NG6 due to the presence of probe beam CILS6. Now AG5 has An and D10 as two inputs and E11 as output. Again Data Input (Di) of the RAM cell is fed to D input of the D flip-flop and E11 is fed as clock (CLK) of the D flip-flop. The flip-flop has outputs Q and
, complement to each other. An, R/
and Q are the three inputs of the AND gate AG6. The output (F12) of AG6 is the final output (D0) of the proposed all-optical 1-bit Read/Write memory cell.
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and Di. Now CLK of the D flip-flop is absent which preserved the previous state (Qn+1 = Qn). So as long as An = 0, the input and output activities are blocked, and the cell is in the hold mode where its stored data is protected.(2) If Address Select input bears photon (An = 1), the cell is enabled for writing and reading operation. There are two possibilities.![]() | Figure 4. All optical random-access memory cell using NLM as switch |
is equal to 0. Then the output D0 (= F12, output of AG6) becomes 0 independent of Q. i.e. the output of the cell is detached from Q. One cannot read from the memory cell in this state. But light will follow the path O11E11 when passing through AG5 as both the input beams (An = D10 = 1) have light. Now the clock of the D flip-flop becomes at logical ‘1’ state. So the D flip-flop stores 0 if Di = D = 0 and writes 1 if Di = D = 1 according to Table 2. Therefore, if An = 1 and R/
= 0, writing (storing) operation of single bit data (Di) is done into the memory cell.
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as 1. There will be no light at E11 terminal as D10 = 0. Again the clock of the D flip-flop is absent. The flip-flop remain in its former output state ignoring D (= Di) input. In the present situation none can write into the memory cell. But for AG6, as two inputs (An = R/
= 1) are at logically high state, the output follows the third input Q. That means Q comes out at D0 through O12F12 direction. Q is nothing but the stored Di bit. So we can conclude that stored digital data will be retrieved from 1-bit read/write memory cell when both the inputs An and R/
transmit light.The function table is given in Table 3. All-optical 1-bit RAM cell can store digital optical data and retrieve it as desired. In our scheme we use all optical AND and NOT gate in designing the all optical 1-bit RAM cell. In our design the light beam which is fed back is coming from the output of a NOT gate. Again the concept used here to design the all optical NOT gate has an advantage. Whenever the output of a NOT gate is assumed to be at ‘1’ state, the source of that ‘1’ state is a constant intensity pulse laser source (CILS) used as probe beam. So in each feedback arrangement described in our scheme similar intense light beam is fed back. In this way the reduction of intensity by using beam splitter will not affect the non-linear response of the device. The light sources are so chosen that each input beam intensity is in the range of intensity which is detected as ‘1’ by the detector after refraction. The source of the final output (D0) of the RAM cell is CILS3. As long as the power is on, the stored data bit is protected and the data retrieval is possible. Therefore the proposed all-optical RAM cell can be used as volatile memory cell.