Nanoscience and Nanotechnology

p-ISSN: 2163-257X    e-ISSN: 2163-2588

2017;  7(2): 27-33



Efficient Design of Feynman and Toffoli Gate in Quantum dot Cellular Automata (QCA) with Energy Dissipation Analysis

Provash Kumar Biswas 1, Ali Newaz Bahar 1, Md. Ahsan Habib 1, Md. Abdullah-Al-Shafi 2

1Department of Information and Communication Technology, Mawlana Bhashani Science and Technology University, Tangail, Bangladesh

2Institute of Information Technology (IIT), University of Dhaka, Dhaka, Bangladesh

Correspondence to: Ali Newaz Bahar , Department of Information and Communication Technology, Mawlana Bhashani Science and Technology University, Tangail, Bangladesh.


Copyright © 2017 Scientific & Academic Publishing. All Rights Reserved.

This work is licensed under the Creative Commons Attribution International License (CC BY).


Reversible computing in Quantum-dot Cellular Automata (QCA) is an expanding research field at ultra low power nano-computing area. Utilization of minimum power, rapid momentum, advanced switch in grate and scale arrangement of QCA assurances cost operative proficient logic outline with extreme intricacy at nano-scale. In this article two fundamental reversible logic gates, Feynman and Toffoli gate are presented. In contrast with earlier QCA layouts, the proposed designs are achieved with the lowest number of QCA cells, minimal extent and clock delay exclusive of any wire-crossing approaches. Moreover, the proposed circuits have been verified and simulated using QCADesigner and QCAPro has been employed to estimate the power dissipation.

Keywords: Feynman gate, Toffoli gate, Quantum-dot Cellular Automata, QCADesigner, QCAPro

Cite this paper: Provash Kumar Biswas , Ali Newaz Bahar , Md. Ahsan Habib , Md. Abdullah-Al-Shafi , Efficient Design of Feynman and Toffoli Gate in Quantum dot Cellular Automata (QCA) with Energy Dissipation Analysis, Nanoscience and Nanotechnology, Vol. 7 No. 2, 2017, pp. 27-33. doi: 10.5923/j.nn.20170702.01.

1. Introduction

As stated by Moore, the constituent’s quantities on a chip will twice every 18 months [1]. In recent times, existing metal oxide semiconductor (CMOS) archetype apprehends to its substantial confines and confronts certain defiant difficulties as challenges in the aspect size diminution and the extreme power utilization. Quantum-dot cellular automata are notable nanotechnology and one of the substitutes to switch the regular CMOS archetype with holding better density and swift switching momentum [2, 3]. QCA archetype is a united computation and conduction method to form logical circuits at nano-scale level and projected to perform with thicknesses of 1012 devices/cm2 in 100 GHz range [3-5]. These promote several researchers to perform novel circuits in QCA [6-18]. The layouts of Feynman gate have been explored in based on QCA [19-23]. Coplanar crossing based Toffoli gate has been introduced in [24]. A novel design of QCA based Toffoli gate has been presented in [25, 26]. This article represents the QCA outline of two imperative reversible gates such as Feynman and Toffoli gate. Besides, the energy depletion by the proposed designs is assessed that approves the outlook of QCA micro-device performing as are placement phase for the realization of reversible logic circuits. The firmness of the layouts beneath thermal randomness is assessed, presenting the effective proficiency of the proposed layouts.
This paper is organized as follows. In Section 2 the layout of the proposed Feynman and Toffoli gate is illustrated. The simulation and result comparison is presented in Section 3. Section 4 shows the energy utilization and consistency of the proposed layouts. Finally, the study is concluded in Section 5.

2. Proposed Reversible Gates

Reversible circuits have a wide range of application in low power logical circuit design [12, 18, 20, 22]. The total figure of outputs and inputs are identical in reversible gates. Whenever require to attain the number of outputs and inputs equal, an additional output or input can be adjoined. So, in a reversible logic circuit a one to one correlation between the outputs and inputs endures. Moreover, it should be designed with minimum amount of reversible gates, garbage outputs and quantum cost to have a better realization and least intricacy [15, 16].

2.1. Feynman Gate

Feynman is a 2x2 reversible gate containing a quantum cost equivalent to one. It is extensively utilized to present fan out in reversible circuits. The logical expression between the inputs (A, B) and outputs (P, Q) is presented by:
The simulated circuit diagram of the proposed Feynman gate is given in Figure 1(a).
Figure 1. Proposed QCA design of (a) Feynman gate, (b) Toffoli gate

2.2. Toffoli Gate

Toffoli is a 3x3 reversible gate having a quantum cost of five. In this reversible gate, the inputs (A, B, C) are associated to the outputs (P, Q, R) by:
In Figure 1, the QCA outlines of proposed Feynman and Toffoli gates are presented. These designs are realized using a novel 3-input XOR [27-29] gate and the gained the least number of QCA cells, covered space and without typical wire crossing. The proposed Feynman gate takes only 14 QCA cell with a region of 0.011μm2 and with similar region Toffoli gate contains only 20 QCA cell. Regardless of allowing the substantially united QCA designs, not any of the wire crossing methods is operated to permeate the difficulties of wire crossing methods. Since in the multi-layer technique, double QCA wires within crossover permit through two distinct levels that absences a substantial realization as the assembling procedure would be complex because of its multi-layered type and assembling effort.

3. Simulation and Result Analysis

The simulations are attained by bistable simulation engine, QCADesigner [30]. The input-output waveform of the proposed Feynman and Toffoli gates is shown in Figure 2 (a) and (b) respectively. In Figure 2, the outcomes of bistable tool with the succeeding features are applied: relative permittivity 12.90, clock down 3.8×10−23 J, clock up 9.8×10−22J, amplitude factor of clock 2.00, and highest iterations per sample 100. It can be realized from Figure 2, the designs work acceptable and the outcomes of all proposed QCA circuits attain thorough extremely polarized signals that can present a top drivability for QCA circuits.
Figure 2. Simulation outcome of the proposed QCA circuits (a) Feynman gate, (b) Toffoli gate
Table 1 presents comprehensive assessment among the proposed outlines and the earlier works. It is transparent that proposed designs are improved and optimized than all the former designs with a significant dominance. For instance, the proposed Feynman gate requires 81.33% less cells and occupies 86.25% less area compared to the design of [19]. In comparison with the earlier Toffoli gate [26], the imperative enhancements attained for the proposed Toffoli gate is 54.55% in the cells count, 74% in area. The overall enhancement is shown in Figure 3.
Table 1. Comparison of the proposed circuits with the earlier layouts
Figure 3. Designing improvement achieved by the proposed (a) Feynman gate and (b) Toffoli gate over the previous design

4. Energy Depletion and Consistency Analysis

Every QCA cell shows equivalent energy depletion. Through procedure in single cycle, the depletion by the total circuit is projected by respecting the whole of energy depletion of all majority voters with inverters [31-33]. The QCAPro tools has been used to find the depletion of the proposed circuits at temperature T=2.0 K in separate channeling energy [34]. At 0.5 Ek tunneling energy level our proposed Feynman and Toffoli gate dissipate 10.02 meV e and 23.28 meV e respectively. The energy dissipation of proposed design at different tunneling energy level is given in Table 2 and the thermal map is shown in Figure 4.
The output polarization of any cell of the QCA layout is diminished by enhancing the temperature [16]. The process in [18] described the overall significance of output polarization. The temperature consequence on the output polarization of the proposed outlines is shown in Figure 5. From the figure, it is clear that both the design works proficiently between 1K to 10K. At the temperature 11K, the average output polarization drops dramatically and the design start malfunctioning.
Table 2. Energy dissipation of proposed design at different tunneling energy leve
Figure 4. Energy dissipation maps of (a) Feynman gate and (b) Toffoli gate at 2K temperature with 0.5 Ek tunneling energy level
Figure 5. Temperature consequence on output polarization of the proposed QCA layouts

5. Conclusions

In this paper, an efficient layout of Feynman and Toffoli gate has been presented in QCA technology. The proposed design is intense and has depleted latency than the existing design. Simulation outcome of the proposed circuit reveal the accuracy and efficacy. The proposed outlines are proficient to overcome the limitations of the earlier QCA design. These novel designs can be utilized as proper modules for fabricating of the low power consuming reversible nano communication device.


[1]  G. E. Moore, “Cramming more components onto integrated circuits, Reprinted from Electronics, volume 38, number 8, April 19, 1965, pp.114 ff.,” IEEE Solid-State Circuits Society Newsletter, vol. 11, no. 5, pp. 33–35, Sep. 2006.
[2]  C. S. Lent, P. D. Tougaw, W. Porod, and G. H. Bernstein, “Quantum cellular automata,” Nanotechnology, vol. 4, no. 1, p. 49, 1993.
[3]  P. D. Tougaw and C. S. Lent, “Logical devices implemented using quantum cellular automata,” Journal of Applied Physics, vol. 75, no. 3, pp. 1818–1825, Feb. 1994.
[4]  M. Abdullah-Al-Shafi and A. N. Bahar, “QCA: An Effective Approach to Implement Logic Circuit in Nanoscale,” 5th International Conference on Informatics, Electronics & Vision (ICIEV), International Conference on, IEEE, 13-14 May 2016.
[5]  M. Abdullah-Al-Shafi, “Analysis of Fredkin Logic Circuit in Nanotechnology: An Efficient Approach,” International Journal of Hybrid Information Technology, vol. 9, no. 2, pp. 371–380.
[6]  A. N. Bahar, S. Waheed, M. A. Uddin, and M. A. Habib, “Double Feynman Gate (F2G) in Quantum- dot Cellular Automata (QCA),” International Journal of Computer Science Engineering, vol. 2, no. 6, pp. 351–355.
[7]  A. Sarker, A. N. Bahar, P. K. Biswas, and M. Morshed, “A novel presentation of peres gate (PG) in quantum-dot cellular automata (QCA),” European Scientific Journal, vol. 10, no. 21, pp. 101–106, 2014.
[8]  Rahman, M. A. Habib, A. N. Bahar, Z. Rahman, and Anisur, “Novel Design of BCD to Excess-3 Code Converter in Quantum Dots Cellular Automata (QCA),” Global Journal of Research In Engineering, vol. 14, no. 4, Jun. 2014.
[9]  A. N. Bahar, S. Waheed, and M. A. Habib, “An Efficient Layout Design of Fredkin Gate in Quantum-dot Cellular Automata (QCA),” Düzce Üniversitesi Bilim ve Teknoloji Dergisi, vol. 3, no. 1, pp. 219–225, 2015.
[10]  S. Islam, S. Farzana, and S. A. N. Bahar, “Area efficient layout design of Multiply Complements Logic (MCL) gate using QCA Technology,” Global Journal of Research In Engineering, vol. 14, no. 4, 2014.
[11]  A. N. Bahar, S. Waheed, and N. Hossain, “A new approach of presenting reversible logic gate in nanoscale,” SpringerPlus, vol. 4, no. 1, Dec. 2015.
[12]  S. Islam, M. A. Shafi and A. N. Bahar, “Implementation of Binary to Gray Code Converters in Quantum Dot Cellular Automata,” Journal of Today’s Ideas – Tomorrow’s Technologies, vol. 3, no. 2, pp. 145-160, 2015.
[13]  A. A. Shafi, A. N. Bahar, and M. S. Islam, “A Quantitative Approach of Reversible Logic Gates in QCA,” Journal of Communications Technology, Electronics and Computer Science, vol. 3, no. 0, pp. 22–26, Dec. 2015.
[14]  A. Al-Shafi and A. N. Bahar, “Novel Binary to Gray Code Converters in QCA with Power Dissipation Analysis,” International Journal of Multimedia and Ubiquitous Engineering, vol. 11, no. 8, pp. 379–396, Aug. 2016.
[15]  M. S. Islam, M. Abdullah-Al-Shafi, and A. N. Bahar, “A New Approach of Presenting Universal Reversible Gate in Nanoscale,” International Journal of Computer Applications, vol. 134, no. 7, pp. 1–4, 2016.
[16]  Pudi, Vikramkumar, and K. Sridharan. "Efficient design of a hybrid adder in quantum-dot cellular automata." IEEE transactions on very large scale integration (VLSI) systems 19, no. 9 (2011): 1535-1548. doi: 10.1109/TVLSI.2010.2054120.
[17]  A. N. Bahar and S. Waheed, “Design and implementation of an efficient single layer five input majority voter gate in quantum-dot cellular automata,” SpringerPlus, vol. 5, no. 1, Dec. 2016.
[18]  M. Abdullah-Al-Shafi and A. N. Bahar, “Optimized design and performance analysis of novel comparator and full adder in nanoscale,” Cogent Engineering, vol. 3, no. 1, Sep. 2016.
[19]  P. Biswas, N. Gupta, N. Patidar, “Basic Reversible Logic Gates and It’s QCA Implementation”, International Journal of Engineering Research and Applications, vol. 4, no. 6, pp. 12-16, 2014.
[20]  J. C. Das and D. De, “Reversible Binary to Grey and Grey to Binary Code Converter using QCA,” IETE Journal of Research, vol. 61, no. 3, pp. 223–229, May 2015.
[21]  M. Abdullah-Al-Shafi, M. Shifatul, and A. N. Bahar, “A Review on Reversible Logic Gates and its QCA Implementation,” International Journal of Computer Applications, vol. 128, no. 2, pp. 27–34, Oct. 2015.
[22]  J. C. Das and D. De, “Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication,” Frontiers Inf Technol Electronic Eng, vol. 17, no. 3, pp. 224–236, Mar. 2016.
[23]  A. N. Bahar, S. Waheed, and M. A. Habib, “A novel presentation of reversible logic gate in Quantum-dot Cellular Automata (QCA),” in 2014 International Conference on Electrical Engineering and Information Communication Technology (ICEEICT), 2014, pp. 1–6.
[24]  M. Rolih, “Analysis of possible logical reversible gate realization in ternary quantum-dot cellular automata,” engd, Univerza v Ljubljani, 2013.
[25]  A. N. Bahar, M. A. Habib, and N. K. Biswas, “A Novel Presentation of Toffoli Gate in Quantum-dot Cellular Automata (QCA),” International Journal of Computer Applications, vol. 82, no. 10, pp. 1–4, Nov. 2013.
[26]  B. Cvetkovska, I. Kostadinovska, and J. Danek, “Implementing the Toffoli gate in Quantum-dot Cellular Automata”, Seminar project at University of Ljubljana in the winter semester of the academic, (2013) 1-12.
[27]  A. N. Bahar, S. Waheed, N. Hossain, and M. Asaduzzaman, “A novel 3-input XOR function implementation in quantum-dot cellular automata with energy dissipation analysis,” Alexandria Engineering Journal, vol. 56, 2017.
[28]  A. N. Bahar, M. S. Uddin, M. Abdullah-Al-Shafi, M. M. R. Bhuiyan, and K. Ahmed, “Designing efficient QCA even parity generator circuits with power dissipation analysis,” Alexandria Engineering Journal.
[29]  A. N. Bahar, K. Roy, M. Asaduzzaman, and M. M. R. Bhuiyan, “Design and Implementation of 1-bit Comparator in Quantum-dot Cellular Automata (QCA),” Cumhuriyet Science Journal, vol. 38, no. 1, pp. 146–152, 2017.
[30]  K. Walus, T. J. Dysart, G. A. Jullien, and R. A. Budiman, “QCADesigner: a rapid design and Simulation tool for quantum-dot cellular automata,” IEEE Transactions on Nanotechnology, vol. 3, no. 1, pp. 26–31, Mar. 2004.
[31]  S. Srivastava, S. Sarkar, and S. Bhanja, “Estimation of Upper Bound of Power Dissipation in QCA Circuits,” IEEE Transactions on Nanotechnology, vol. 8, no. 1, pp. 116–127, Jan. 2009.
[32]  M. Abdullah-Al-Shafi, A. N. Bahar, P. Z. Ahmad, F. Ahmad, M. M. R. Bhuiyan, and K. Ahmed, “Power analysis dataset for QCA based multiplexer circuits,” Data in Brief, vol. 11, pp. 593–596, Apr. 2017.
[33]  A. N. Bahar, M. M. Rahman, N. M. Nahid, and M. K. Hassan, “Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata,” Data in Brief, vol. 10, pp. 557–560, Feb. 2017.
[34]  S. Srivastava, A. Asthana, S. Bhanja, and S. Sarkar, “QCAPro - An error-power estimation tool for QCA circuit design,” in 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, pp. 2377–2380.