1. Introduction

During last two decades the current conveyors (CCII) have been dominating in the area of analog signal processing due to their functional versatility in addition to higher signal bandwidth and greater linearity. As a result vast variety of linear and nonlinear analog signal processing applications are reported in technical literature[1-21]. Recently, the introduction of digital control to the CCII has introduced the possibility of on chip control of continuous time systems with high resolution capability and reconfigurability[6-16]. Such reconfigurable modules are suitable for realizing the field programmable analog array [21-23].

In analog signal processing, the current-mode (CM) circuits are receiving more attention for their potential advantages such as inherent wider bandwidth, wide dynamic range, and better noise immunity[1],[3],[7],[12], [14],[18-20]. In this paper a digitally programmable current mode multifunctional filter (DPCMMF) has been proposed, which uses three CMOS digitally programmable CCII (DPCCII) along with grounded passive resistors and capacitors. The proposed filter provides second order low pass filter (LPF), high pass filter (HPF) and band pass filter (BPF) simultaneously with single current input. The filter parameters such as pole-ω₀ and pole-Q are independently controllable through digital control word. To verify the proposed theory the DPCMMF was designed and verified using PSPICE and the results obtained justify the theory.

2. Proposed Circuit

The digitally programmable Current Conveyor (DPCCII) is a versatile building block for analog signal processing applications[6]. The digitally programmable CCII with gain N is shown in Fig. 1 and its CMOS implementation is shown in Fig. 2.

Figure 1. DPCCII symbolic representation

(1)

(2)

Figure 2. CMOS implementation of a 3-bit DPCCII with current gain N[6]

The power integer is m = 1 when the current gain is N, and m = −1 when the current gain is N⁻¹. The proposed digitally programmable CM second-order filter is shown Fig. 3.

Figure 3. Proposed digitally programmable biquadratic filter

The circuit uses three DPCCIIs, two grounded capacitors and four grounded resistors. DPCCIIs ① and ② have a gain of N₁ and N₂ respectively, while DPCCII ③ has a gain of N₃⁻¹. Analysis of the proposed circuit using equation (1) yields the following transfer functions:

(3)

(4)

(5)

with

(6)

Equations (3) to (6) represents LP, BP and HP transfer functions respectively. The filter gain parameters are:

(7)

and the pole frequency and pole-Q are given as:

(8)

and

(9)

From equation (8) and (9) it is clear that the pole frequency and pole-Q can be independently controlled by varying digital control word. Assuming R₁ = R₂ = R₃ = R₄ = R, C₁ = C₂ = C and N₁ = N₂ = N, equations (8) and (9) reduce to:

(10)

(11)

Equation (11) shows that the pole-Q is directly proportional to the control word applied at DPCCII ③.

3. Effect of Non-Idealities and Parasitics

This section deals with the non-ideal analysis of the proposed circuit. A DPCCII is characterized by the following non-ideal transfer gains.

(12)

where β_i is the voltage gain from Y and X terminal of DPCCII-i. α_1i and α_2i are the current transfer gains from X terminal to Z+ and Z− respectively where i = 1, 2, 3. Using equation (12) the ideal transfer functions of the second order filters given in equations (3), (4) and (5) yield the following non-ideal transfer functions.

(13)

(14)

(15)

Where

(16)

The non-ideal pole-frequency and pole-Q are expressed as:

(17)

(18)

From equations (17) and (18), it is clear that due to non-idealities of DPCCII, the pole frequency and pole-Q slightly deviate from ideal values. From equation (17), it is also clear that the active and passive sensitivities of pole frequency are found to be half in magnitude.

Next consider the effect of parasitics associated with DPCCII. In DPCCII port-Y parasitics are in the form of R_Y//C_Y, port-Z parasitics are in the form of R_Z//C_Z, and port-X parasitics in the form of series resistance R_X. The modified transfer functions taking into account the above parasitics can be expressed as:

(19)

(20)

(21)

where

(22)

and

R₁' = R₁+ R_X

R₂' = R₂+ R_X

R₃' = R₃∥C_P (since R_P = R₃∥R_Y∥R_Z and C_P = C_Z+C_Y )

R₄' = R₄+ R_X

C₁' = C₁+C_Z+C_Y

C₂' = C₂+C_Y+2C_Z

Since the parasitic capacitances C_Z, C_Y are very small (in the range of fFs) and the port-Y parasitic resistances are very high (in the range of MΩ), the values of R₁', R₂', C₁' and C₂' are not significantly different from the values of R₁, R₂, C₁ and C₂, the value of ω_o as found from (22) would not deviate much from the ideal value found from (8).

From (22), it is evident that the parasitic capacitance (C_P) causes a third order term to appear in D_P(s). The corner frequency due to the parasitic capacitance is given by

(23)

However, since the value of C_P is small, the value of ω_P would be very high,

(24)

and therefore no substantial change in the frequency response, considering the effect of parasitic, is thus observed due to the inclusion of the third-order term. Further, since C_P is a very low value, its effect can be neglected from (19) to (22).

4. Design and Verification

The proposed filter, shown in Fig. 3, is verified by designing it for a variable pole frequency by selecting different control words. The supply voltages are taken as V_DD = V_SS = ± 0.75 V. Weights were set digitally by connecting the[a₂, a₁, a₀] in Fig. 2 to a suitable voltage. For instance, to set a digital control word of[0 1 0], a₃ was connected to V_SS, a₂ was connected to V_DD and a₀ was connected to V_SS. The element values chosen are R₁ = R₂ = R₃ = R₄ = R =1 KΩ and C₁ = C₂ = C = 0.4 nF.

The filter responses are obtained by applying the same control words (N₁=N₂) to DCCCIIs ① and ②. Fig. 4 and 5 shows the low-pass and the high-pass responses. The band-pass response is depicted in Fig. 6. All the responses are obtained for the same set of control word N = 1, 2, 4, 7 and corresponds to curves A, B, C and D in Fig. 4 to Fig. 6. In addition, all the responses have a gain of unity. The simulated pole frequencies obtained are 385 KHz, 786 KHz, 1.58 MHz and 2.7 MHz while the corresponding theoretical frequency values are 397.8 KHz, 795.7 KHz, 1.59 MHz and 2.78 MHz respectively. As can be seen the simulated and theoretical frequencies are in close agreement.

The variation of pole-Q by varying N₃ (as 1, 2, 4 and 7) at 385KHz frequency is shown in Fig. 7 and the values of pole-Q obtained through simulation are 1, 1.98, 3.85 and 6.7 while the corresponding theoretical values are 1, 2, 4 and 7 respectively.

Figure 4. Tuning of LP filter function with digital control word

Figure 5. Tuning of HP filter function with digital control word

Figure 6. Tuning of BP filter function with digital control word

Figure 7. A Pole-Q variation with digital control word at 385KHz

5. Conclusions

The paper presents a current-mode biquadratic filter with digital control of filter parameters. The circuit is CMOS compatible and suitable for monolithic implementation by virtue of use of all grounded passive elements. Other features of interest are that the pole-frequency and pole-Q are independently digitally controlled, and low sensitivities of pole frequency (ω_0n) with respect to active and passive components. Non-idealities of the active element are also considered along with the parasitics involved, so as to evaluate the performance of the proposed filter.